1. NAME▲

struct_irq_chip_generic - Generic irq chip data structure

2. SYNOPSIS ▲



 
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struct irq_chip_generic {
  raw_spinlock_t lock;
  void __iomem * reg_base;
  unsigned int irq_base;
  unsigned int irq_cnt;
  u32 mask_cache;
  u32 type_cache;
  u32 polarity_cache;
  u32 wake_enabled;
  u32 wake_active;
  unsigned int num_ct;
  void * private;
  struct list_head list;
  struct irq_chip_type chip_types[0];
};

3. MEMBERS ▲

lock
    Lock to protect register and cache data access

reg_base
    Register base address (virtual)

irq_base
    Interrupt base nr for this chip

irq_cnt
    Number of interrupts handled by this chip

mask_cache
    Cached mask register

type_cache
    Cached type register

polarity_cache
    Cached polarity register

wake_enabled
    Interrupt can wakeup from suspend

wake_active
    Interrupt is marked as an wakeup from suspend source

num_ct
    Number of available irq_chip_type instances (usually 1)

private
    Private data for non generic chip callbacks

list
    List head for keeping track of instances

chip_types[0]
    Array of interrupt irq_chip_types

4. DESCRIPTION ▲

Note, that irq_chip_generic can have multiple irq_chip_type implementations which can be associated to a particular irq line of an irq_chip_generic instance. That allows to share and protect state in an irq_chip_generic instance when we need to implement different flow mechanisms (level/edge) for it.

5. AUTHORS ▲

Thomas Gleixner <>
    Author.

Ingo Molnar <>
    Author.

6. COPYRIGHT ▲